Enhanced polyphase digital pre-distortion structure with low complexity in radio transmitter

ABSTRACT

Systems, methods, apparatuses, and computer program products for an enhanced polyphase digital pre-distortion (DPD) structure in a radio transmitter. A method may include creating a combined pre-distorted component by combining each of the pre-distorted polyphase components. Each of the plurality of pre-distorted polyphase components are single phase dependent. Further, the method may include feeding the combined pre-distorted component to an output filter to form a pre-distorted transmission signal. The method may also include generating an output signal by applying the pre-distorted transmission signal to the power amplifier to generate an output signal.

CROSS

This application claims priority to Finnish patent application 20225668filed Jul. 14, 2022, the disclosure of which is incorporated herein byreference.

FIELD

Some example embodiments may generally relate to mobile or wirelesstelecommunication systems, such as Long Term Evolution (LTE) or fifthgeneration (5G) new radio (NR) access technology, or 5G beyond, or othercommunications systems. For example, certain example embodiments mayrelate to apparatuses, systems, and/or methods for an enhanced polyphasedigital pre-distortion (DPD) structure in a radio transmitter.

BACKGROUND

Examples of mobile or wireless telecommunication systems may include theUniversal Mobile Telecommunications System (UMTS) Terrestrial RadioAccess Network (UTRAN), LTE Evolved UTRAN (E-UTRAN), LTE-Advanced(LTE-A), MulteFire, LTE-A Pro, fifth generation (5G) radio accesstechnology or NR access technology, and/or 5G-Advanced. 5G wirelesssystems refer to the next generation (NG) of radio systems and networkarchitecture. 5G network technology is mostly based on NR technology,but the 5G (or NG) network can also build on E-UTRAN radio. It isestimated that NR may provide bitrates on the order of 10-20 Gbit/s orhigher, and may support at least enhanced mobile broadband (eMBB) andultra-reliable low-latency communication (URLLC) as well as massivemachine-type communication (mMTC). NR is expected to deliver extremebroadband and ultra-robust, low-latency connectivity and massivenetworking to support the IoT.

SUMMARY

In accordance with some example embodiments, a method may includecreating a combined pre-distorted component by combining each of aplurality of pre-distorted polyphase components. Each of the pluralityof pre-distorted polyphase components are single phase dependent. Themethod may further include feeding the combined pre-distorted componentto an output filter to form a pre-distorted transmission signal. Themethod may further include generating an output signal by applying thepre-distorted transmission signal to the power amplifier to generate anoutput signal.

In accordance with certain example embodiments, an apparatus may includemeans for creating a combined pre-distorted component by combining eachof a plurality of pre-distorted polyphase components. Each of theplurality of pre-distorted polyphase components are single phasedependent. The apparatus may further include means for feeding thecombined pre-distorted component to an output filter to form apre-distorted transmission signal. The apparatus may further includemeans for generating an output signal by applying the pre-distortedtransmission signal to the power amplifier to generate an output signal.

In accordance with various example embodiments, a non-transitorycomputer readable medium may include program instructions that, whenexecuted by an apparatus, cause the apparatus to perform at least amethod. The method may include creating a combined pre-distortedcomponent by combining each of a plurality of pre-distorted polyphasecomponents. Each of the plurality of pre-distorted polyphase componentsare single phase dependent. The method may further include feeding thecombined pre-distorted component to an output filter to form apre-distorted transmission signal. The method may further includegenerating an output signal by applying the pre-distorted transmissionsignal to the power amplifier to generate an output signal.

In accordance with some example embodiments, a computer program productmay perform a method. The method may include creating a combinedpre-distorted component by combining each of a plurality ofpre-distorted polyphase components. Each of the plurality ofpre-distorted polyphase components are single phase dependent. Themethod may further include feeding the combined pre-distorted componentto an output filter to form a pre-distorted transmission signal. Themethod may further include generating an output signal by applying thepre-distorted transmission signal to the power amplifier to generate anoutput signal.

In accordance with certain example embodiments, an apparatus may includeat least one processor and at least one memory storing instructionsthat, when executed by the at least one processor, cause the apparatusat least to create a combined pre-distorted component by combining eachof a plurality of pre-distorted polyphase components. Each of theplurality of pre-distorted polyphase components are single phasedependent. The at least one memory and instructions, when executed bythe at least one processor, may further cause the apparatus at least tofeed the combined pre-distorted component to an output filter to form apre-distorted transmission signal. The at least one memory andinstructions, when executed by the at least one processor, may furthercause the apparatus at least to generate an output signal by applyingthe pre-distorted transmission signal to the power amplifier to generatean output signal.

In accordance with various example embodiments, an apparatus may includecreating circuitry configured to perform creating a combinedpre-distorted component by combining each of a plurality ofpre-distorted polyphase components. Each of the plurality ofpre-distorted polyphase components are single phase dependent. Theapparatus may further include feeding circuitry configured to performfeeding the combined pre-distorted component to an output filter to forma pre-distorted transmission signal. The apparatus may further includegenerating circuitry configured to perform generating an output signalby applying the pre-distorted transmission signal to the power amplifierto generate an output signal.

BRIEF DESCRIPTION OF THE DRAWINGS

For proper understanding of example embodiments, reference should bemade to the accompanying drawings, wherein:

FIG. 1 an example enhanced polyphase digital pre-distortion (EPD)structure that linearizes a power amplifier (PA) over a large bandwidth(BW) with a minimal requirement on a sample rate.

FIG. 2 illustrates an example of a polyphase structure with single phasedependency, according to certain example embodiments.

FIG. 3 illustrates an example system representation of a digitalpre-distortion (DPD) with a diagonal S-matrix, according to certainexample embodiments.

FIG. 4 illustrates an example polyphase representation of S₁ with basisfunction filtering, according to certain example embodiments.

FIG. 5 illustrates an example polyphase representation of sub-sampledS-matrix belonging to S₁ with basis function filtering, according tocertain example embodiments.

FIG. 6 illustrates another example polyphase representation ofsub-sampled S-matrix belonging to S₁ with basis function filtering,according to certain example embodiments.

FIG. 7 illustrates another example polyphase representation ofsub-sampled S-matrix S₁ with basis function filtering, according tocertain example embodiments.

FIG. 8 illustrates an example polyphase representation of sub-sampledoutput finite impulse response (FIR) filter, according to certainexample embodiments.

FIG. 9 illustrates an example polyphase representation of sub-sampledoutput FIR filter, according to certain example embodiments.

FIG. 10 illustrates an example DPD block diagram, according to certainexample embodiments.

FIG. 11(a) illustrates an example S-matrix for standard polyphase DPD(SPD) and basic EPD, according to certain example embodiments.

FIG. 11(b) illustrates an example S-matrix for sub-sampled S-matrix (SS)EPD, according to certain example embodiments.

FIG. 11(c) illustrates an example S-matrix sub-sampled output filter(SoF) EPD according to certain example embodiments.

FIG. 12 illustrates an example transmission feedback (TX-FB) errorspectrum for all four engines in experiment set I, according to certainexample embodiments.

FIG. 13(a) illustrates an example S-matrix for SPD and basic EPD,according to certain example embodiments.

FIG. 13(b) illustrates an example S-matrix SS EPD, according to certainexample embodiments.

FIG. 13(c) illustrate an example S-matrix for SoF EPD, according tocertain example embodiments.

FIG. 14 illustrates an example TX-FB error spectrum for all four enginesin experiment set II, according to certain example embodiments.

FIG. 15 illustrates an example flow diagram of a method, according tocertain example embodiments.

FIG. 16 illustrates a set of apparatuses, according to certain exampleembodiments.

DETAILED DESCRIPTION

It will be readily understood that the components of certain exampleembodiments, as generally described and illustrated in the figuresherein, may be arranged and designed in a wide variety of differentconfigurations. The following is a detailed description of some exampleembodiments of systems, methods, apparatuses, and computer programproducts for an enhanced polyphase DPD (EPD) structure in a radiotransmitter. For instance, in some example embodiments, the EPDstructure may include sub-sampled output filter.

The features, structures, or characteristics of example embodimentsdescribed throughout this specification may be combined in any suitablemanner in one or more example embodiments. For example, the usage of thephrases “certain embodiments,” “an example embodiment,” “someembodiments,” or other similar language, throughout this specificationrefers to the fact that a particular feature, structure, orcharacteristic described in connection with an embodiment may beincluded in at least one embodiment. Thus, appearances of the phrases“in certain embodiments,” “an example embodiment,” “in someembodiments,” “in other embodiments,” or other similar language,throughout this specification do not necessarily refer to the same groupof embodiments, and the described features, structures, orcharacteristics may be combined in any suitable manner in one or moreexample embodiments. Further, the terms “base station”, “cell”, “node”,“gNB”, “network” or other similar language throughout this specificationmay be used interchangeably.

As used herein, “at least one of the following: <a list of two or moreelements>” and “at least one of <a list of two or more elements>” andsimilar wording, where the list of two or more elements are joined by“and” or “or,” mean at least any one of the elements, or at least anytwo or more of the elements, or at least all the elements.

FIG. 1 illustrates an example EPD structure 100 that linearizes a poweramplifier (PA) over a large bandwidth (BW) with a minimal requirement ona sample rate. In particular, as illustrated in FIG. 1 , the EPDstructure 100 receives an incoming signal x(k) 101. The incoming signalx(k) is received at multiple polyphase filters 105 a, 105 b, 105 c.Instead of pre-distorting the transmission signal x(k) directly with asingle pre-distorter circuitry (e.g., using a single pre-distortionmodel and with certain pre-distortion model coefficients), thetransmission signal x(k) is divided into two or more polyphasecomponents of the transmission signal before pre-distorting. Thepolyphase components may be given by a polyphase decomposition of thetransmission signal x(k).

As illustrated in FIG. 1 , the division into polyphase components may berealized using a set of input polyphase filters 105 a, 105 b, 105 c, onefor each polyphase component. Division into polyphase components mayalso be realized using two or more parallel pre-distorters 110 a, 110 b,110 c, a set of output polyphase filters 115 a, 115 b, 115 c, and asummer 125. In certain example embodiments, each of the input polyphasefilters 105 a, 105 b, 105 c, may be finite impulse response (FIR)filters whose impulse response (or response to any finite length input)is of finite duration, settling to zero in finite time.

By performing a polyphase decomposition by feeding the transmissionsignal to a set of input polyphase filters 105 a, 105 b, 105 cconfigured in different ways, a set of polyphase signal sharing a firstsampling rate may be produced. As the different polyphase componentsignals have been sampled at different time instances, they may providedifferent information about the transmission signal. By combining theinformation carried in the set of signals, the original transmissionsignal may be reproduced with a second sampling rate where the secondsampling rate may be equal to or larger than the first sampling rate.The second sampling rate may also be called a virtual sampling rate asthe corresponding sampling is achieved by simulating a signal with ahigh sampling rate with multiple signals with lower sampling rates. Forexample, if two polyphase components of the transmission signal areproduced by two FIR filters, the two polyphase components may becombined to form a transmission signal with double the sampling ratecompared to the sampling rate of the individual polyphase components bytaking every other sample from the first polyphase component signal andevery other from the second polyphase component signal. Therefore, byperforming the polyphase division, the sample rate needed for a systemmay be reduced with little effect on the overall performance.

After the two or more polyphase components of the transmission signalhave been created, these polyphase component signals are fed to two ormore parallel pre-distorters 110 a, 110 b, 110 c. As illustrated in FIG.1 , each polyphase component of the transmission signal may be fed toone or more parallel pre-distorters 110 a, 110 b, 110 c of the two ormore parallel pre-distorters 110 a, 110 b, 110 c where they may be usedto form a signal with an increased number of samples compared to theindividual polyphase components. That is, the input signals of eachparallel pre-distorter 110 a, 110 b, 110 c may include one more morepolyphase components of the transmission signal.

As illustrated in FIG. 1 , the input signals of each parallelpre-distorter 110 a, 110 b, 110 c may include all the polyphasecomponents of the transmission signal produced by the input polyphasefilters 105 a, 105 b, 105 c. The parallel pre-distorters 110 a, 110 b,110 c may perform nonlinear memory-based modeling on the polyphasecomponent signals according to predistortion models with predistortioncoefficients determined and communicated to the parallel pre-distorter110 a, 110 b, 110 c by the identification unit 120 to compensate for thenonlinearity of the PA 135.

As further illustrated in FIG. 1 , the identification unit 120 may takethe transmission signal x(k), the pre-distorted transmission outputsignal y(k) 127, and the output signal of the PA 135 as its inputsignals. However, the identification unit 120 may only take as its inputthe output signal of the PA 135 and one of the transmission signal andthe output signal y(k) 127. The identification may be configured unitmay be configured to optimize the pre-distortion models and theircoefficients based on input signals such that linear response isachieved for the total cascade formed by the polyphase filters, thedigital-to-analog converter 130, and the PA 135. For instance, theidentification unit 120 may first identify the response of the PA 135(e.g., a PA model and/or an inverse PA model), and then evaluate whatthe optimal configuration of the parallel pre-distorters 110 a, 110 b,110 c would be to compensate for the nonlinearities of the PA 135response. Determination of the optimal configuration may includeselecting a pre-distortion model and a set of pre-distortion parametervalues for the model for each of the parallel pre-distorters 110 a, 110b, 110 c. The pre-distortion models may be described using weightedpolynomials, weighted Taylor series, weighted Volterra series, piecewiselinear functions, splines, sum of time-shifted relations of an inputvariable with weights, or any combination of the above-mentioned types.

As also illustrated in FIG. 1 , after the two or more polyphasecomponents of the transmission signal have been pre-distorted by the twoor more parallel pre-distorters 110 a, 110 b, 110 c, each of the outputsignals x_(pred)(k) of the parallel pre-distorters 110 a, 110 b, 110 care fed to a corresponding polyphase filter 115 a, 115 b, 115 c andfiltered again using different (output) filtering coefficients and/ororders. This second set of filters 115 a, 115 b, 115 c may act asrecombination filters, performing filtering such that the resultingsignals may be summed together by the summer 125. The summer 125reproduces the original transmission signal x(k) or at least the shapeof the original transmission signal x(k) (e.g., the amplitude may belowered but the shape is re-solved).

In FIG. 1 , in the standard configuration, the input polyphase filters105 a, 105 b, 105 c may create multiple phases of the incoming signal toachieve de facto un-sampling. Additionally, the output polyphase filters115 a, 115 b, 115 c may achieve two functions at one stroke-one is aliascancellation, and the other is BW restriction. However, in thefull-fledged form, the EPD structure 100 may improve the modelingaccuracy by unlocking various degrees of freedom. For example, thecoefficients for the several phases may be independently identified.Additionally, each phase may have a different S-matrix, which is subjectto optimization. Furthermore, the input and output polyphase filtersh_(poly,in,j), j=0, 1, . . . , I and h_(poly,out,j), j=0, 1, . . . , Ican be further optimized. These three items may turn a standardpolyphase DPD (SPD) engine into an EPD one. However, two out of thethree items above may need optimization, which almost invariablyinvolves a limited number of test cases-sometimes just one. The more theparameters are tailor-made for a specific test case, the less genericthey are.

Moreover, inherent in any polyphase implementation of DPD (SPD or EPD)may be the myriad of interconnections between the several phases. In onecase, when every phase is dependent on all phases, that number may go ashigh as M². This may be burdensome in terms of hardware (HW) resources,and may not be possible to implement on legacy HW.

As described herein, certain example embodiments may provide a simplerstructure that removes the interconnections between the several phases,but still retain the advantages of EPD over SPD in terms of modelingaccuracy. Certain example embodiments may also replace the heavyoptimization of the original EPD with methodical and direct manipulationof various parameters. As also described herein, the subclass of EPDwith only the coefficients for the several phases independentlyidentified may be called basic EPD, which represents the most basic formof EPD without any polyphase filter optimization, and with all phasessharing the same S-matrix.

Certain example embodiments described herein may have various benefitsand/or advantages to overcome the disadvantages described above. Forexample, certain example embodiments may provide an SoF EPD structurethat improves the basic EPD without resorting to optimization.Additionally, certain example embodiments are not for any specificcarrier configuration and are thus versatile and flexible. Moreover, itis possible to achieve all such improvements with reduced complexity.Thus, certain example embodiments discussed below are directed toimprovements in computer-related technology.

From FIG. 1 , it can be seen that each DPD polyphase block is dependentupon input signals from all phases, which is true for both SPD and EPD.According to certain example embodiments, the DPD polyphase structure100 in FIG. 1 may be simplified by severing all interconnections betweenthe several phases so that each DPD polyphase block becomes dependentonly on its own phase. This is shown in, for example, FIG. 2 , whichillustrates an example of a polyphase structure 200 with single phasedependency, according to certain example embodiments. As illustrated inFIG. 2 , the polyphase input filters 210 a, 210 b, 210 c receives aninput transmission signal x[n] 205. The polyphase input filters E_(m)210 a, 210 b, 210 c may be by default, fractional delay filters, andG_(m) 220 a, 220 b, 220 c represent the polyphase output filters. Asillustrated in FIG. 2 , the polyphase structure 200 has single phasedependency wherein each parallel pre-distorter 215 a, 215 b, 215 creceives a corresponding output signal from each of the polyphase in putfilters 210 a, 210 b, 210 c. The output signals from the parallelpre-distorters 215 a, 215 b, 215 c are filtered again by correspondingpolyphase output filters 220 a, 220 b, 220 c, after which the resultantsignals are combined and transmitted as a pre-distorted transmissionsignal y[n] 225.

The basic clock rate of this structure 200 may be f_(s)/M, the basicsample period may be MT_(s). Additionally, the equivalent sample ratethrough polyphase splitting and combining may be f_(s), and theequivalent sample period may be T_(s). Here in FIG. 2 , f_(s)T_(s)=1. Incertain example embodiments, this structure 200 may be used either asSPD or EPD, in the sense that the DPD coefficients of the several phasesmay be identical (as in the case of SPD), or different (as in the caseof EPD).

The simplification illustrated in FIG. 2 may define a subclass ofpolyphase DPD (standard or enhanced), and what it represents is DPD withsub-sampled S-matrix, assuming the polyphase input and output filtersremain standard. In certain example embodiments, the polyphase DPD mayinclude a sub-sampled S-matrix because at a higher abstract level, theequivalent S-matrix now has a step size of MT_(s) due to the severedconnections between the phases, making the DPD blocks focus exclusivelyon the [−f_(s)/(2M), f_(s)/(2m)] frequency region.

According to certain example embodiments, discrete linear time invariant(LTI) systems may have representations using, for example, thez-transform. The LTI systems (e.g., z-transform representation) may beuseful in the case of multi-rate digital signal processors (DSP)involving polyphase structures. However, in general, DPD being anonlinear system cannot use this representation. Instead, it may bepossible to do so if certain restrictions are imposed such as, forexample, on the S-matrix. For instance, it may be assumed S⊂Z×Z is theS-matrix set, and the subset that represents the S-matrix on thediagonal may be as follows:

S ₁={(m,n)∈S|m=n}

If the S-matrix belongs to S1, then for each basis function, thenonlinearity may be extricated out completely and used at the input of adiscrete LTI system, as illustrated in FIG. 3 . For example, withrespect to a basis function, based upon un-predistorted TX signal x, apredistortion signal y may be generated by applying a series offunctions g₁, g₂, g₃, with coefficients, and summing the outputs, suchthat y=a₁*g₁(x)+a₂*g₂(x)+a₃*g₃(x)+ . . . . In some example embodiments,g₁, g₂, g₃, . . . may be basis functions since they serve as bases, andcoefficients a₁, a₂, a₃, . . . may be identified by DPD.

FIG. 3 illustrates an example system representation of DPD 300 with thediagonal S-matrix S₁, where nonlinearity is extricated and placed at theinputs, according to certain example embodiments. In FIG. 3 , the clockrate may be f_(s) everywhere, and i=0, 1, 2, . . . are indices of thebasis functions. Further, x[n] is the desired transmit signal sequence,v_(i)[n] are signal sequences the sum of which over i form thepre-distortion signal z[n], ϕ_(i) are the eigen-functions, andH^((i))(z) represent linear filters, the taps of which may be determinedby the S-matrices belonging to S₁, and the coefficients of which areexactly those of the basis functions to be identified.

In various example embodiments, a DPD block may include a group ofS-matrix taps, each of which correspond to a series of linear ornonlinear basis functions. For example, 10 taps, each of which has 12basis functions, would result in a total of 120 basis functions.However, if the S-matrix belongs to S1, these 120 basis functions may begrouped by basis function types, the output of which may be fed througha 10 tap filter. Node 305 may represent one member of such a group,while node 310 may represent the 10 tap filter.

According to certain example embodiments, the enhanced polyphase DPD mayoperate at a reduced clock rate of f_(s)/M from input signal throughoutto the output signal. To achieve this type of operation, the systemrepresentation illustrated in FIG. 3 may be taken, and H^((i))(z) andG(z) may be decomposed to the polyphase form, as illustrated in FIG. 4 .In particular, FIG. 4 illustrates a polyphase decomposition of FIG. 3 ,according to certain example embodiments. As illustrated in FIG. 4 ,there is a total of M² interconnections between the M phases.

The simplification exemplified in FIG. 2 may be equivalent to settingH_(m) ^(i)(z^(M)) to zero for all m≥1, resulting in FIG. 5 . FIG. 5illustrates an example polyphase representation of sub-sampled S-matrixbelonging to S₁ 500 with basis function filtering, according to certainexample embodiments. Since linear systems may be commutable, H₀^(i)(z^(M)) 410 a may be moved next to G_(m)(z^(m)), where m=0, 1, . . ., M−1 to facilitate the use of Nobel Identity when the output v_(i)[n]is to be down-sampled by M, as illustrated in FIG. 6 . In particular,FIG. 6 illustrates an example polyphase representation of sub-sampledS-matrix belonging to S₁ 600 with basis function filtering, according tocertain example embodiments. Finally, as illustrated in FIG. 7 , theNoble Identity is used to simplify the filter blocks. Specifically, FIG.7 illustrates an example polyphase representation of sub-sampledS-matrix S₁ 700 with basis function filtering, according to certainexample embodiments.

According to certain example embodiments, the coefficients of H₀ ^(i)(z)are to be identified. In SPD, all phases may share the same H₀ ^(i)(z).However, the identification should not be performed on a single phaseonly, as this may have aliases built in while the feedback signal doesnot. Instead, the identification may be performed by adding all phasesfor each basis function and each S-matrix tap. In EPD, different phasesmay have different H₀ ^(i)(z), in terms of coefficients at the veryleast, and in terms of taps in general.

In certain example embodiments, it may be important to observe that forthe S-matrix taps that are identical among the several phases, eventhough their coefficients are identified independently in EPD, no newfrequency information is added. If, for example, each phase has the same10-tap S-matrix, then the overall DPD system may still be a 10-tapsystem, only for each basis function of each tap, M coefficients areidentified, which eventually adds up to only one coefficient (see FIGS.5-7 ). This may also be true for generic basic EPD. As discussed herein,the method of EPD with sub-sampled S-matrix may be known as SS EPD.

Examining the structure in FIG. 4 , an alternative way of simplificationmay be achieved. For instance, as illustrated in FIG. 8 , in certainexample embodiments, rather than sub-sampling the S-matrix, the DPDoutput FIR filter can be sub-sampled by setting G_(m)(z^(M)) to zero forall m≥1. Specifically, FIG. 8 illustrates an example polyphaserepresentation of sub-sampled output FIR filter 800, according tocertain example embodiments.

FIG. 9 illustrates an example polyphase representation of sub-sampledoutput FIR filter 900, according to certain example embodiments. Inparticular, the transformation illustrated in FIG. 9 is similar to thatillustrated in FIG. 7 .

As illustrated in FIGS. 8 and 9 , the output FIR filter G(z) restrictsthe DPD linearization BW to f_(p), which must be smaller than f_(s)/M sothat the DPD output signal may be downsampled by M without aliasing.From the angle of polyphase filter implementation, for G_(m)(z), m=0, 1,. . . , M−1 may serve two functions including, for example, aliascancellation, and further DPD linearization BW restriction. According tocertain example embodiments, G(z) may be decomposed into the product oftwo polynomials G(z)=G′(z)G″(z), where G′(z) restricts the BW tof_(s)/M, and, thus, achieving alias cancellation when the signal isdownsampled. Additionally, G″(z) restricts the signal further down tof_(p)<f_(s)/M. It is G″(z) that can be downsampled by M since theincoming signal after G′(z) is already bandlimited to f_(s)/M. In thecase of the simplification described above, G′(z) may be absorbed intoH^((i))(z), which is to be identified. This is because, given an aliasfree feedback (FB) signal with a sample rate of f_(s)/M, the DPDparameter identification will yield coefficients that naturally restrictthe DPD output signal to within f_(s)/M, thereby relieving the basisfunction FIR filter G(z) from its alias cancellation function, making itpossible to safely downsample G(z) by M. Thus, according to certainexample embodiments, the number of DPD output filters may be reduced byM-fold.

In various example embodiments, an M-fold polyphase output filter may bereduced to a single filter, that the interconnections between theseveral phases can be severed, and that these can be done without losingeither the number of S-matrix taps or the resolution thereof.

FIG. 10 illustrates an example DPD block diagram 1000, according tocertain example embodiments. In particular, FIG. 10 illustrates apolyphase with sub-sampled output filter. In certain exampleembodiments, for the DPD block 1000 to function, the DPD coefficientsfor the several phases may not be identical, and may be independentlyidentified. As previously described, with the basic EPD illustrated inFIG. 1 and the SS EPD illustrated in FIG. 2 , by merely identifying theDPD coefficients for the several phases separately, does not increasethe number of modeling taps, which results in in an unrefined frequencyresolution. In contrast, SoF EPD may increase the number of modelingtaps by M-fold. For instance, with reference to FIG. 8 , thecoefficients of H₀ ^((i)), H₁ ^((i)), . . . H_((M-1)) ^((i)) interleaveseach other by design, and together form MN coefficients for this i^(th)function, where N is the number of taps for each H₀ ^((i)), H₁ ^((i)), .. . H_((M-1)) ^((i)). Additionally, with reference to FIG. 10 , theinteger nonlinear tap delays in each DPD₀, DPD₁, . . . DPD_(M-1) blockare shifted by the fractional delay filters E₀, E₁, . . . E_(M-1),making it impossible for any two taps between two different phases to bethe same, and consequently increasing the total number of taps to MN.Thus, since no two taps between two different phases are the same, itmay be possible to improve the numerical condition number of theidentification problem.

According to certain example embodiments, it may be possible to verifythe results achieved by the SoF EPD. For instance, verification may beachieved between SS EPD and SoF EPD since they share the same modelcomplexity, where the only difference is in the coefficients of theoutput polyphase filter. However, basic EPD with interconnectionsbetween the several phases may be quite different from SS EPD and SoFEPD. For comparison, an S-matrix of the same size with SS EPD may beselected. The basis functions may be kept the same throughout so thatthe total number of modeling coefficients remain the same. Finally, SPDis added into the comparison as well to provide a reference as it mayhave the same block diagram representation with basic EPD, but the DPDblocks in the several phases may share the same coefficients. Thus, intotal, there may be four engines for comparison.

In certain example embodiments, the device-under-test (DUT) may be a 40W average power GaN PA designed for C-band (between 3700 MHz and 3980MHz). A test signal of 2×NR100 may be used side by side with 7.6 dB PAR,and centered at 3800 MHz. The learning algorithm used for all theexperiments may be a direct learning algorithm (DLA) with 10 iterations.Two sets of experiments may be performed, wherein one experiment aims at400 MHz linearization BW, and the other at 800 MHz. The two sets ofexperiments are summarized in Table 1 below.

TABLE 1 DUT Experimental Summary Experiment set DPD BW f_(s) M Size ofS-matrix for each phase I 400 1966.08 4 8 MHz Msps II 800 166.08 2 10MHz Msps

As illustrated in Table 1, f_(s) is the effective sample rate of the DPDsystem, and M is the number of phases. Additionally, the effectivesample rate f_(s) equals the base clock rate of the polyphase systemmultiplied by M.

In certain example embodiments, within each set, upon the lastiteration, several figures of merit may be used to compare theeffectiveness of four engines including, for example, mean square error(MSE) between the FB and TX signal, and an adjacent channel leakageratio (ACLR) of the PA output signal. In certain example embodiments,the MSE between the FB and TX signal may calculate how closely the PAoutput signal matches the desired transmit signal, and a power spectraof various signals may be plotted for direct visual comparison.

In the first experiment set of Table 1, the base clock rate of thepolyphase structure may be set to 491.52 MPs, and the number of phases Mmay be set to 4. The effective sample rate of the system may bef_(s)=4×491.52=1966.08 Msps. The DPD linearization BW may be set to 400MHz, and the effective S-matrices used are illustrated in FIGS.11(a)-11(c). In particular, FIG. 11(a) illustrates an example S-matrixfor SPD and basic EPD, according to certain example embodiments. FIG.11(b) illustrates an example S-matrix for SS EPD, according to certainexample embodiments, and FIG. 11(c) illustrates an example S-matrix SoFEPD according to certain example embodiments. As further illustrated inFIGS. 11(a)-11(c), the corresponding effective clock rate f_(s) is4×491.52=1966.08 Msps, and the effective step size is T_(s)=1/f. In FIG.11(a), since the step size is T_(s), interconnections between theseveral phases may be required, which is contrary to the case of FIGS.11(b) and 11(c).

In certain example embodiments, the step size of the delay in FIG. 11(a)is T_(s), the step size of the delay in FIG. 11(b) is 4T_(s), and thesteps size of the delay for each phase in FIG. 11(c) is 4T_(s), but theoverall step size achieved in FIG. 11(c) is T_(s). The S-matricesillustrated in FIGS. 11(a)-11(c) are called effective because they arethe S-matrices at f_(s) when the details of polyphase implementation areabstracted out. Here, the benefit of SoF EPD may be visible as itincreases the number of S-matrix taps by M-fold, fully taking advantageof and consequently fully justifying the independent identification ofDPD coefficients in several phases.

Table 2 compares the MSE and ACLR of SPD, basic EPD, SS EPD, and SoF EPD(i.e., engines).

TABLE 2 Experiment set I result comparison. Engine MSE (dB) ACLR Lower(dBC) ACLR Upper (dBC) SPD −34.15 −46.21 −46.50 Basic EPD −41.27 −46.61−46.15 SS EPD −36.56 −39.51 −40.28 SoF EPD −43.19 −48.60 −50.00

As shown in FIG. 12 , it can be seen that SoF EPD outperforms all otherengines in all figures of merit. This agrees with the theoreticalanalysis and shows the power of SoF EPD. Additionally, it can be seenthat basic EPD has much better MSE than SPD, but the ACLR values thereofare comparable. Thus, the difference in MSE lies mostly underneath thecarrier. This is illustrated in FIG. 12 , where the spectra of the errorsignal are plotted for all four engines. In particular, FIG. 12illustrates an example TX-FB error spectrum for all four engines inexperiment set I, according to certain example embodiments. In certainexample embodiments, each engine may run a base clock rate of 491.52Msps, and each engine may have four phases.

In the second experiment set of Table 1, the base clock rate of thepolyphase structure may be set to 983.04 Msps, and the number of phasesM may be set to 2. Thus, the effective sample rate of the system isf_(s)=2×983.04=1966.08 Msps. Additionally, the DPD linearization BW isset to 800 MHz, and the effective S-matrices used are illustrated inFIGS. 13(a)-13(c). In particular, FIG. 13(a) illustrates an exampleS-matrix for SPD and basic EPD, according to certain exampleembodiments. FIG. 13(b) illustrates an example S-matrix SS EPD,according to certain example embodiments. FIG. 13(c) illustrate anexample S-matrix for SoF EPD, according to certain example embodiments.The step size of the delay in FIG. 13(a) is T_(s), the step size of thedelay in FIG. 13(b) is 2T_(s), and the steps size of the delay for eachphase in FIG. 13(c) is 2T_(s), but the overall step size achieved inFIG. 13(c) is T_(s).

As illustrated in FIGS. 13(a)-13(c), the effective clock rate f_(s) is2×983.04=1966.08 Msps, and the effective step size is T_(s)=1/f_(s). InFIG. 13(a), since the step size is T_(s), interconnections between theseveral phases may be required. This is contrary to the casesillustrated in FIGS. 13(b) and 13(c).

Table 3 compares the MSE and ACLR of all four engines. As seen in Table3, SoF EPD outperforms all other engines in all figures of merit.

TABLE 3 Experiment set II result comparison. Engine MSE (dB) ACLR Lower(dBC) ACLR Upper (dBC) SPD −38.55 −47.24 −46.69 Basic EPD −40.24 −47.24−47.14 SS EPD −39.53 −47.23 −46.87 SoF EPD −41.24 −48.91 −50.36

FIG. 14 illustrates an example TX-FB error spectrum for all four enginesin experiment set II, according to certain example embodiments. In theexample of FIG. 14 , each engine may run a base clock rate of 983.04Msps, and each engine may have two phases. As illustrated in FIG. 14 ,SoF EPD outperforms all other engines in all figures of merit. SoF EPDalso outperforms basic EPD visibly without running any optimizer, andwith a significantly less complex structure. Moreover, SoF DPD is notdependent on the exact carrier configuration, making it generic. Theonly change in carrier that prompts a change in SoF DPD configurationmay be instantaneous BW (IBW), based on which M, and the output filterBW can be increased or decreased.

FIG. 15 illustrates an example flow diagram of a method, according tocertain example embodiments. In an example embodiment, the method ofFIG. 15 may be performed by a network entity, or a group of multiplenetwork elements in a 3GPP system, such as LTE or 5G-NR. For instance,in an example embodiment, the method of FIG. 15 may be performed by aradio transmitter similar to one of apparatuses 10 or 20 illustrated inFIG. 16 .

According to certain example embodiments, the method of FIG. 15 mayinclude, at 1500, receiving, at a radio transmitter, a transmissionsignal for linearization of a power amplifier. The method may alsoinclude, at 1505, dividing the transmission signal into a plurality ofpolyphase components via a plurality of polyphase input filters of theradio transmitter. The method may further include at 1510,pre-distorting each of the plurality of polyphase components by feedingeach of the plurality of polyphase components to a respective digitalpre-distortion circuit. In addition, the method may include, at 1515,creating a combined pre-distorted component by combining each of thepre-distorted polyphase components. Further, the method may include, at1520, feeding the combined pre-distorted component to an output filter(Go) to form a pre-distorted transmission signal. The method may alsoinclude, at 1525, applying the pre-distorted transmission signal to thepower amplifier to generate an output signal.

FIG. 16 illustrates a set of apparatuses 10 and 20 according to certainexample embodiments. In certain example embodiments, apparatuses 10 andmay be elements in a communications network or associated with such anetwork. For example, apparatus 10 may be radio transmitter of a UE, BS,or other similar radio communication computer device, and apparatus 20may be a network (i.e., gNB).

In some example embodiments, apparatuses 10 and 20 may include one ormore processors, one or more computer-readable storage medium (forexample, memory, storage, or the like), one or more radio accesscomponents (for example, a modem, a transceiver, or the like), and/or auser interface. In some example embodiments, apparatuses 10 and 20 maybe configured to operate using one or more radio access technologies,such as GSM, LTE, LTE-A, NR, 5G, WLAN, WiFi, NB-IoT, Bluetooth, NFC,MulteFire, and/or any other radio access technologies. It should benoted that one of ordinary skill in the art would understand thatapparatuses 10 and 20 may include components or features not shown inFIG. 16 .

As illustrated in the example of FIG. 16 , apparatuses 10 and 20 mayinclude or be coupled to a processors 12 and 22 for processinginformation and executing instructions or operations. Processors 12 and22 may be any type of general or specific purpose processor. In fact,processors 12 and 22 may include one or more of general-purposecomputers, special purpose computers, microprocessors, DSPs,field-programmable gate arrays (FPGAs), application-specific integratedcircuits (ASICs), and processors based on a multi-core processorarchitecture, as examples. While a single processors 12 and 22 is shownin FIG. 16 , multiple processors may be utilized according to otherexample embodiments. For example, it should be understood that, incertain example embodiments, apparatuses 10 and 20 may include two ormore processors that may form a multiprocessor system (e.g., in thiscase processors 12 may represent a multiprocessor) that may supportmultiprocessing. According to certain example embodiments, themultiprocessor system may be tightly coupled or loosely coupled (e.g.,to form a computer cluster).

Processors 12 and 22 may perform functions associated with the operationof apparatuses 10 and 20 including, as some examples, precoding ofantenna gain/phase parameters, encoding and decoding of individual bitsforming a communication message, formatting of information, and overallcontrol of the apparatuses 10 and 20, including processes and examplesillustrated in FIGS. 1-15 .

Apparatuses 10 and 20 may further include or be coupled to a memories 14and 24 (internal or external), which may be respectively coupled toprocessors 12 and 24 for storing information and instructions that maybe executed by processors 12 and 24. Memories 14 and 24 may be one ormore memories and of any type suitable to the local applicationenvironment, and may be implemented using any suitable volatile ornonvolatile data storage technology such as a semiconductor-based memorydevice, a magnetic memory device and system, an optical memory deviceand system, fixed memory, and/or removable memory. For example, memories14 and 24 can be comprised of any combination of random access memory(RAM), read only memory (ROM), static storage such as a magnetic oroptical disk, hard disk drive (HDD), or any other type of non-transitorymachine or computer readable media. The instructions stored in memories14 and 24 may include program instructions or computer program codethat, when executed by processors 12 and 22, enable the apparatuses 10and 20 to perform tasks as described herein.

In certain example embodiments, apparatuses 10 and 20 may furtherinclude or be coupled to (internal or external) a drive or port that isconfigured to accept and read an external computer readable storagemedium, such as an optical disc, USB drive, flash drive, or any otherstorage medium. For example, the external computer readable storagemedium may store a computer program or software for execution byprocessors 12 and 22 and/or apparatuses 10 and 20 to perform any of themethods and examples illustrated in FIGS. 1-15 .

In some example embodiments, apparatuses 10 and 20 may also include orbe coupled to one or more antennas 15 and 25 for receiving a downlinksignal and for transmitting via an UL from apparatuses 10 and 20.Apparatuses 10 and 20 may further include a transceivers 18 and 28configured to transmit and receive information. The transceivers 18 and28 may also include a radio interface (e.g., a modem) coupled to theantennas 15 and 25. The radio interface may correspond to a plurality ofradio access technologies including one or more of GSM, LTE, LTE-A, 5G,NR, WLAN, NB-IoT, Bluetooth, BT-LE, NFC, RFID, UWB, and the like. Theradio interface may include other components, such as filters,converters (for example, digital-to-analog converters and the like),symbol demappers, signal shaping components, an Inverse Fast FourierTransform (IFFT) module, and the like, to process symbols, such as OFDMAsymbols, carried by a downlink or an UL.

For instance, transceivers 18 and 28 may be configured to modulateinformation on to a carrier waveform for transmission by the antennas 15and 25 and demodulate information received via the antenna 15 and 25 forfurther processing by other elements of apparatuses 10 and 20. In otherexample embodiments, transceivers 18 and 28 may be capable oftransmitting and receiving signals or data directly. Additionally oralternatively, in some example embodiments, apparatus 10 may include aninput and/or output device (I/O device). In certain example embodiments,apparatuses 10 and 20 may further include a user interface, such as agraphical user interface or touchscreen.

In certain example embodiments, memories 14 and 34 store softwaremodules that provide functionality when executed by processors 12 and22. The modules may include, for example, an operating system thatprovides operating system functionality for apparatuses 10 and 20. Thememory may also store one or more functional modules, such as anapplication or program, to provide additional functionality forapparatuses 10 and 20. The components of apparatuses 10 and 20 may beimplemented in hardware, or as any suitable combination of hardware andsoftware. According to certain example embodiments, apparatuses 10 and20 may optionally be configured to communicate each other (in anycombination) via a wireless or wired communication links 70 according toany radio access technology, such as NR.

According to certain example embodiments, processors 12 and 22 andmemories 14 and 24 may be included in or may form a part of processingcircuitry or control circuitry. In addition, in some exampleembodiments, transceivers 18 and 28 may be included in or may form apart of transceiving circuitry.

For instance, in certain example embodiments, apparatus 10 may becontrolled by memory 14 and processor 12 to receive, at a radiotransmitter of the apparatus, a transmission signal for linearization ofa power amplifier. Apparatus 10 may also be controlled by memory 14 andprocessor 12 to divide the transmission signal into a plurality ofpolyphase components via a plurality of polyphase input filters of theradio transmitter. Apparatus 10 may further be controlled by memory 14and processor 12 to pre-distort each of the plurality of polyphasecomponents by feeding each of the plurality of polyphase components to arespective digital pre-distortion circuit. In addition, apparatus 10 maybe controlled by memory 14 and processor 12 to create a combinedpre-distorted component by combining each of the pre-distorted polyphasecomponents. Further, apparatus 10 may be controlled by memory 14 andprocessor 12 to feed the combined pre-distorted component to an outputfilter to form a pre-distorted transmission signal. Apparatus 10 mayalso be controlled by memory 14 and processor 12 to generate an outputsignal by applying the pre-distorted transmission signal to the poweramplifier.

In some example embodiments, an apparatus (e.g., apparatus 10 and/orapparatus 20) may include means for performing a method, a process, orany of the variants discussed herein. Examples of the means may includeone or more processors, memory, controllers, transmitters, receivers,and/or computer program code for causing the performance of theoperations.

Certain example embodiments may be directed to an apparatus thatincludes means for performing any of the methods described hereinincluding, for example, means for receiving, at a radio transmitter ofthe apparatus, a transmission signal for linearization of a poweramplifier. The apparatus may also include means for dividing thetransmission signal into a plurality of polyphase components via aplurality of polyphase input filters of the radio transmitter. Theapparatus may further include means for pre-distorting each of theplurality of polyphase components by feeding each of the plurality ofpolyphase components to a respective digital pre-distortion circuit. Inaddition, the apparatus may include means for creating a combinedpre-distorted component by combining each of the pre-distorted polyphasecomponents. Further, the apparatus may include means for feeding thecombined pre-distorted component to an output filter to form apre-distorted transmission signal. The apparatus may also include meansfor generating an output signal by applying the pre-distortedtransmission signal to the power amplifier to generate an output signal.

A computer program product may include one or more computer-executablecomponents which, when the program is run, are configured to carry outsome example embodiments. The one or more computer-executable componentsmay be at least one software code or portions of it. Modifications andconfigurations required for implementing functionality of certainexample embodiments may be performed as routine(s), which may beimplemented as added or updated software routine(s). Software routine(s)may be downloaded into the apparatus.

As an example, software or a computer program code or portions of it maybe in a source code form, object code form, or in some intermediateform, and it may be stored in some sort of carrier, distribution medium,or computer readable medium, which may be any entity or device capableof carrying the program. Such carriers may include a record medium,computer memory, read-only memory, photoelectrical and/or electricalcarrier signal, telecommunications signal, and software distributionpackage, for example. Depending on the processing power needed, thecomputer program may be executed in a single electronic digital computeror it may be distributed amongst a number of computers. The computerreadable medium or computer readable storage medium may be anon-transitory medium.

In other example embodiments, the functionality may be performed byhardware or circuitry included in an apparatus (e.g., apparatus 10 orapparatus 20), for example through the use of an application specificintegrated circuit (ASIC), a programmable gate array (PGA), a fieldprogrammable gate array (FPGA), or any other combination of hardware andsoftware. In yet another example embodiment, the functionality may beimplemented as a signal, a non-tangible means that can be carried by anelectromagnetic signal downloaded from the Internet or other network.

According to certain example embodiments, an apparatus, such as a node,device, or a corresponding component, may be configured as circuitry, acomputer or a microprocessor, such as single-chip computer element, oras a chipset, including at least a memory for providing storage capacityused for arithmetic operation and an operation processor for executingthe arithmetic operation.

One having ordinary skill in the art will readily understand that thedisclosure as discussed above may be practiced with procedures in adifferent order, and/or with hardware elements in configurations whichare different than those which are disclosed. Therefore, although thedisclosure has been described based upon these example embodiments, itwould be apparent to those of skill in the art that certainmodifications, variations, and alternative constructions would beapparent, while remaining within the spirit and scope of exampleembodiments. Although the above embodiments refer to 5G NR and LTEtechnology, the above embodiments may also apply to any other present orfuture 3GPP technology, such as LTE-advanced, and/or fourth generation(4G) technology.

PARTIAL GLOSSARY

-   -   3GPP 3rd Generation Partnership Project    -   5G 5th Generation    -   5GCN 5G Core Network    -   5GS 5G System    -   BB Baseband    -   BS Base Station    -   BW Bandwidth    -   DCI Downlink Control Indicator    -   DL Downlink    -   DPD Digital Pre-Distortion    -   eNB Enhanced Node B    -   EPD Enhanced Polyphase DPD    -   E-UTRAN Evolved UTRAN    -   gNB 5G or Next Generation NodeB    -   LTE Long Term Evolution    -   LTI Linear Time Invariant    -   NR New Radio    -   NW Network    -   PA Power Amplifier    -   RF Radio Frequency    -   RS Reference Signals    -   SoF EPD Enhanced Polyphase DPD with Sub-Sampled Output Filter    -   SPD Standard Polyphase DPD    -   SS Sub-Sampled S-matrix    -   SS EPD Enhanced Polyphase DPD with Sub-Sampled S-matrix    -   UE User Equipment    -   UL Uplink

We claim:
 1. A method comprising: creating a combined pre-distortedcomponent by combining each of a plurality of pre-distorted polyphasecomponents, wherein each of the plurality of pre-distorted polyphasecomponents are single phase dependent; feeding the combinedpre-distorted component to an output filter to form a pre-distortedtransmission signal; and generating an output signal by applying thepre-distorted transmission signal to the power amplifier to generate anoutput signal.
 2. An apparatus comprising: at least one processor; andat least one memory storing instructions that, when executed by the atleast one processor, cause the apparatus at least to create a combinedpre-distorted component by combining each of a plurality ofpre-distorted polyphase components, wherein each of the plurality ofpre-distorted polyphase components are single phase dependent; feed thecombined pre-distorted component to an output filter to form apre-distorted transmission signal; and generate an output signal byapplying the pre-distorted transmission signal to the power amplifier togenerate an output signal.
 3. An apparatus comprising: means forcreating a combined pre-distorted component by combining each of aplurality of pre-distorted polyphase components, wherein each of theplurality of pre-distorted polyphase components are single phasedependent; means for feeding the combined pre-distorted component to anoutput filter to form a pre-distorted transmission signal; and means forgenerating an output signal by applying the pre-distorted transmissionsignal to the power amplifier to generate an output signal.